Technical Field
The present disclosure relates to the technical field of semiconductor processing, particularly to a semiconductor device and a manufacturing method therefor, and more particularly to a dual-gate graphene semiconductor device and a manufacturing method therefor.
Related Art
With the constant development of semiconductor technologies, the size of semiconductor devices have become smaller. Semiconductor devices based on silicon materials are the basis of current semiconductor technologies. Devices based on silicon materials will still be the mainstream of the development of semiconductor technologies at least for an indefinitely long period of time in the future. However, to ensure that semiconductor technologies can continue to evolve according to, for example, the Moore's Law, only reducing the device size proportionally cannot meet the requirements. Therefore, new materials need to be developed in the process of reducing the size of semiconductor devices.
An ideal new material may be introduced into the existing CMOS manufacturing process, so as to lower chip manufacturing costs while improving device performance. Because graphene materials feature good thermal conductivity and high carrier mobility, graphene-based semiconductor devices are considered by the industry as one of the candidate solutions that offers improvement over silicon-based semiconductor devices in the future.
Existing methods for patterning graphene mainly include a photolithography method and a direct laser raster writing method. Although the direct laser raster writing method introduces no other reagents in the process of patterning graphene, a patterned features in the graphene layer obtained by using this method may not be fine enough (i.e., may be of insufficient resolution) and may require a long production cycle. The photolithography method, on the other hand, introduces other chemical reagents during etching, and the use of a developing solution and a stripping solution for, e.g., photo resists, will increase the sheet resistance of the patterned graphene.
Therefore, speedy manufacturing of high-quality semiconductor devices having a patterned graphene layer represents one of the major challenges in the development of new semiconductor processes.